1. Field of the Invention
This invention relates to a voltage generating circuit for outputting a boosted voltage and a semiconductor memory device with the same.
2. Description of the Related Art
A NAND-type flash memory is known as one of electrically rewritable and non-volatile semiconductor memories (EEPROMs). The NAND-type flash memory is formed of multiple memory cells connected in series in such a manner that adjacent two memory cells share a source/drain diffusion layer. Therefore, it has such a feature that the unit cell area is small and it is easy to increase the capacity.
In the EEPROM, it is required to generate various internal voltages, which are boosted from a power supply voltage and used in data read, write and erase modes. A boost circuit for generating such the internal voltage is basically constituted by a charge-pumping circuit and a voltage detection circuit (i.e., limiter circuit) for detecting the output voltage of the charge-pumping circuit to control activation/inactivation thereof.
In case it is used such a step-up write scheme that write pulse voltage application and write-verify are repeatedly performed with the write voltage Vpgm stepped-up by ΔVpgm for every write cycle, it is also necessary to attach an adding circuit for adding ΔVpgm to the write voltage at every cycle.
As the above-described write voltage generating circuit, it has been provided such an example that the step-up voltage is added with a current-adding type of D/A converter (for example, refer to Unexamined Japanese Patent Application Publication No. 11-353889).
To store music data and image data in various mobile devices, it is increased more and more the demand for NAND-type flash memories. To make the storage capacity large more under such the situation, it is necessary to use a multi-level data storage scheme with multiple bits per cell. Therefore, there has been provided various multi-level data storage schemes (for example, refer to Unexamined Japanese Patent Application Publication No. 2001-93288).